Working Group on Power Line Communications

Research projects with public fundings

“Analysis of the in-vehicle power distribution network as a digital transmission medium”, Funded by: Junta de Andalucía. Main researcher: Dr. Francisco Javier Cañete. 2008-2010. show details

“Study, evaluation and development of efficient communication systems over the indoor power line distribution networks”. Funded by the CICYT (Comisión Interministerial de Ciencia y Tecnología). Main researcher: Dr. Luis Díez del Río. 2003-2005. show details

“Study and evaluation of the indoor power line distribution networks as a high speed data transmission medium”, Funded by the CICYT (Comisión Interministerial de Ciencia y Tecnología). Main researcher: Dr. Luis Díez del Río. 2000-2002. show details

Research projects with private fundings

“Implementation of the physical layer of a network simulator for ARM”. Supporting entity: Atmel Spain. Main researcher: Dr. José Antonio Cortés. 2013-present. confidencial

“Consultancy activities on power line communications”. Supporting entity: Atmel Spain. Main researcher: Dr. José Antonio Cortés. 2013. confidencial

“Field evaluation of new generation power line communications technology for last-hop backhaul in small cell deployment application”. Supporting entity: Vodafone Group. Main researcher: Dr. José Antonio Cortés. 2013. confidencial

“Feasibility study of power line communications for last-hop backhaul in small cell deployment”. Supporting entity: Vodafone Group. Main researcher: Dr. José Antonio Cortés. 2012. under NDA

“Analysis of MIMO Systems for PLC channels”. Supporting entity: Marvell Hispania. Main researcher: Dr. Luis Díez del Río. 2011-present. under NDA

“Study of algorithms and architectures to design OFDM systems for PLC”. Supporting Entity: Design of Systems on Silicon (DS2). Main researcher: Dr. Luis Díez del Río. 2009 show details

“Comprehensive Communication Channel for PLC”. Supporting Entity: Design of Systems on Silicon (DS2). Main researcher: Dr. Luis Díez del Río. 2007-2008. hide details

Description

In this project, a channel emulator for indoor broadband PLC channels was developed using an FPGA-based platform.

Results

Details can be found in:

  • F. J. Cañete, L. Díez, J. A. Cortés, J. J. Sánchez-Martínez, and Luis M. Torres, “Time-Varying Channel Emulator for Indoor Power Line Communications”, in Proceedings of the 51th Annual IEEE Global Telecommunications Conference (GLOBECOM), New Orleans, Louisiana, USA, 2008.

“Prototipo de Solución para la Medición de Patrones de Consumo Eléctrico”. Supporting entity: Mediciones Eléctricas de Andalucía S.L. (Medeland). Main researcher: Dr. Luis Díez del Río. 2007-2008. under NDA

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Communications Engineering Department
University of Málaga

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